Title:
TIME INTERLEAVE METHOD AND TIME DEINTERLEAVE METHOD
Document Type and Number:
Japanese Patent JP3911398
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To provide a time interleave method for minimizing memory size and at the same time processing time, and to provide a time deinterleave method.
SOLUTION: The amount of memory for storing the modulation symbol of each carrier for time interleave is obtained for each carrier by {length I of time interleave × (a serial carrier number i × 5) mod96}, an address value corresponding to an obtained amount of memory is set to be the initial value of address to each carrier in the order of carriers, an address number is increased by one for each input of OFDM symbols, a symbol stored in the region of the amount of memory is read from the initial value of the address of each carrier for time interleave output and at the same time the next input symbol is written to the address, the address number is increased by one, and an address is specified so that the address is returned to the initial value when the result address number that has been increased by one reaches the upper-limit value of the address value of the amount of memory obtained for each carrier.
Inventors:
Kenichi Ishihara
Atsushi Shinoda
Atsushi Shinoda
Application Number:
JP2001245114A
Publication Date:
May 09, 2007
Filing Date:
August 13, 2001
Export Citation:
Assignee:
Kenwood Corporation
Leader Electronics Co., Ltd.
Leader Electronics Co., Ltd.
International Classes:
H03M13/27; H04J11/00; H04B14/04; H04L1/00; (IPC1-7): H04J11/00; H03M13/27; H04B14/04; H04L1/00
Domestic Patent References:
| JP8065177A | ||||
| JP2000183757A | ||||
| JP2001136497A | ||||
| JP2000031838A |
Attorney, Agent or Firm:
Iat International Patent Business Corporation
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