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Title:
TIMER DEVICE
Document Type and Number:
Japanese Patent JPS61105486
Kind Code:
A
Abstract:

PURPOSE: To improve the efficiency of a control part by allowing a single timer means to count time for set value of plural timers.

CONSTITUTION: Control parts 12 and 13 sends out data A1 and B1, and TGA and TGB firstly. The data A1 and B1 are compared 14 with each other to output a level 'H' to its output terminal A<B, and a data selector 15 selects the side A of a data input terminal to output the data A1 to an output terminal O. A counter 17, on the other hand, counts time T, so when T=A1, the level 'H' appears at a comparison output terminal A=B. In this state, the output of an OR gate 20 is satisfied with the output A<B of the comparator 14, an AND gate 18 outputs a time-out signal OA. The output of an OR gate 21 is not satisfied, so the output of an AND gate 19 is not satisfied either and the control part 13 does not operate. Then, the comparator 14 outputs the level 'H' to the output terminal A>B to satisfied the output of the gate 21, and the selector 156 selects the data B1 to output the time-out signal TOB to the control part 13.


Inventors:
KAWANABE TETSUYA
Application Number:
JP22664784A
Publication Date:
May 23, 1986
Filing Date:
October 30, 1984
Export Citation:
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Assignee:
CANON KK
International Classes:
G04F3/00; G04G15/00; (IPC1-7): G04F3/00
Attorney, Agent or Firm:
Yasunori Otsuka



 
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