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Patent Searching and Data


Title:
TIMER SYSTEM
Document Type and Number:
Japanese Patent JP3781901
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To reduce a timer error based on the error of oscillation frequency due to the variation of power source voltage even in an oscillator having poor voltage characteristic including frequency fluctuation due to power source voltage. SOLUTION: A time causing 1 second error due to difference of oscillation frequency is calculated in minute unit, hour unit, day unit or month unit, which is made correction interval and the correction quantity is stored as 1 second in EEPROM 7. In the case error larger than 1 second in a minute, the correction interval is made 1 minute and the correction quantity in second unit is stored in EEPROM 7. When the power source at 3 volts is in resting state, CPU 1 does not perform time measurement correction for the reference frequency. In the case the power source at 5 volts is in stand-by state, correction interval time is measured according to the time measurement operation and time counting correction for correction quantity is made at every correction interval according to the correction interval and correction quantity stored in EEPROM 7.

Inventors:
Koichi Sugiura
Application Number:
JP20117798A
Publication Date:
June 07, 2006
Filing Date:
July 01, 1998
Export Citation:
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Assignee:
株式会社リコー
International Classes:
G04G3/00; (IPC1-7): G04G3/00
Domestic Patent References:
JP4211502A
JP7311289A
JP8262164A
JP53003863A
Attorney, Agent or Firm:
Shuji Sanada