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Title:
TIMING EXTRACTING CIRCUIT
Document Type and Number:
Japanese Patent JPS58161549
Kind Code:
A
Abstract:

PURPOSE: To realize the optimum timing extraction even in case an echo component is included, by setting the fixed threshold value and the variable threshold value which is larger than the fixed threshold value and controlling the variable threshold value to set the pulse width of the slice output at a fixed level.

CONSTITUTION: A bipolar input signal is converted into a signal of positive or negative polarity by a full-wave rectifying circuit 2 and applied to slicing circuits 3 and 4. The circuit 4 performs slicing with the first fixed threshold value; while the circuit 3 uses the second threshold value controlled by a control circuit 6 to perform the slicing. The circuit 6 decides an echo signal with a deciding output of a polarity deciding circuit 5 if a primary signal and its following signal have the same polarity. The circuit 6 controls the second threshold value when it is decided a signal is not equal to an echo signal and so that the slice output of the circuit 3 is set at the prescribed pulse width within a period during which the slice output of the circuit 4 exists. Then the slice output is delivered through a terminal 7 as a signal which is used for extraction of timing.


Inventors:
TSUDA TOSHITAKA
NAKAJIYOU TAKAFUMI
FUKUDA SETSU
Application Number:
JP4399582A
Publication Date:
September 26, 1983
Filing Date:
March 19, 1982
Export Citation:
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Assignee:
FUJITSU LTD
International Classes:
H04L7/027; H04L7/02; (IPC1-7): H04L7/02
Domestic Patent References:
JPS4840647A1973-06-14
JPS46529A
Attorney, Agent or Firm:
Akashi Kashiwaya (3 outside)



 
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