PURPOSE: To generate plural timings in one cycle with simple constitution by employing a triangle wave generating circuit and a step wave generating circuit as basic configuration and adding an offset voltage generating circuit and a comparator corresponding to them.

CONSTITUTION: An output signal of a triangle wave generating circuit TG1 or a step wave generating circuit TG2 and a minute level specifying a unit timing are added or subtracted analogically to generate an offset voltage with respect to the output of the triangle wave generating circuit TG1 or the step wave generating circuit TG2. The output signal of the triangle wave generating circuit TG1, the output signal of the step wave generating circuit TG2 and the output signal of the triangle wave generating circuit TG1 or the step wave generating circuit TG2 and the output signal of the offset voltage generating circuit VG are fed respectively comparators CMPs 1, 2. Thus, plural timings are generated in one cycle with simple constitution.