PURPOSE: To provide the low frequency oscillation circuit which is mounted in a semiconductor integrated circuit and makes a high-speed operation test possible with an LSI tester while keeping low energy consumption at the time of normal operations.

CONSTITUTION: In addition to the oscillation circuit formed by an external input terminal 53, external output terminal 54, internal output terminal 52, inverters 4 and 8 and resistor 5 for feedback, this circuit is composed of a tristate buffer circuit formed by a test enable terminal 51, NAND circuit 1, inverter 2, NOR circuit 3 and PMOS transistors 6 and 7. The tristate buffer circuit is operated as a buffer circuit for reinforcing drive ability only at the time of the high-speed operation test with the LSI tester and thus, the high-speed operation test of the oscillation circuit is made possible.