PURPOSE: To provide a serial data receiving circuit which can receive the serial data via a single signal line and can reduce the packing area.

CONSTITUTION: A serial data receiving circuit contains a control part where the output a comparator which detects a clock signal after input of a ternary signal and the output of a comparator which detects a data signal are computed and synthesized together. That is, a comparator COMPC detects the clocks and a comparator COMPD detects the data respectively. Then an exclusive OR circuit EXO produces the data on the LOW state, and the output of the circuit EXO or the comparator COMPD is switched to a shift register SR based on the clock and data conditions. Then the output of a DSEL 1 is fetched by the register SR with the output of the comparator COMPC used as a clock. In such a constitution, only a single wiring suffices to the outside and the packaging area can be reduced for a serial data receiving circuit.