Login| Sign Up| Help| Contact|

Patent Searching and Data


Title:
FLIP-FLOP
Document Type and Number:
Japanese Patent JPS5812420
Kind Code:
A
Abstract:

PURPOSE: To lower the input threshold voltage of an RSF, and to improve sensitivity to a set and a reset input, by adding emitter resistances to prescribed transistors (TR).

CONSTITUTION: The collectors of TRs Q9 and Q12 having the emitters connected in common are connected to a power source through resistances RL5 and RL6 respectively, and the emitter connection point is connected to a constant- current source C5. Further, a TRQ10 has the collector connected to the collector of the TRQ9 and the base connected to the collector of the TRQ12, and a TRQ11 has the collector connected to the collector of the TRQ12 and the base connected to the collector of the TRQ9. The emitters of the TRs Q10 and Q11 are connected to said source C5 through emitter resistaces RE1 and RE2. Thus, the emitter resistances are added to the TRs Q10 and Q11 to lower the input threshold voltage, improving sensitivity to a set and a reset input.


Inventors:
YAMADA KAZUMI
Application Number:
JP11053481A
Publication Date:
January 24, 1983
Filing Date:
July 15, 1981
Export Citation:
Click for automatic bibliography generation   Help
Assignee:
NIPPON ELECTRIC CO
International Classes:
H03K3/286; H03K3/2885; (IPC1-7): H03K3/286
Attorney, Agent or Firm:
Shin Uchihara