PURPOSE: To make it possible to obtain stable outputs.

CONSTITUTION: This device is provided with N picture elements A1,...AN, N+2 stages E1,...EN+2 shift registers where each stages generates a pulse signal, first reset gates R1,...RN, buffer circuits B1,...BN, second reset gates Tb1,...TbN, selection gates D1,...DN and a common output line. The first reset gate Ri resets the output of the picture element Ai to a reference voltage level based on the pulse signal from the i+2 stage Ei+2 of the shift register. The buffer circuit Bi outputs the output signal in accordance with the incident light quantity and integration time of the picture element Ai based on the pulse signal from the i stage Ei of the shift register. The second reset gate Tbi resets bias voltage VB held in the capacitor C of the buffer circuit Bi based on the pulse signal from the i+2 stage Ei+2 of the shift register. The selection gate Di transmits the output of the buffer circuit Bi to the common output line based on the pulse signal from the i+1 stage Ei+1 of the shift register.