Title:
【発明の名称】光源の高速駆動用CMOS技術回路
Document Type and Number:
Japanese Patent JP2867251
Kind Code:
B2
Abstract:
The circuit comprises bias and modulation current generators (T1...T6) for both p-type and n-type optical sources, and a pair of sources of control voltages (B, M) for the bias and modulation current generators, which obtain pairs of control voltages from an adjustable driving current. An external signal allows selecting, by means of a control logic (LC) and CMOS gates (P1...P6), the generators required by the source (LA). The circuit is made by using three pads of an integrated circuit, one for each control voltage source (B, M) and the third (D) comprising the current generators (T1...T6), the CMOS gates (P1...P6) and the control logic (LC).
Inventors:
BURUUNO BOSUTEIKA
MARUKO BURUJIO
PAORO PEREGURIINO
RUKA PESANDO
MARUKO BURUJIO
PAORO PEREGURIINO
RUKA PESANDO
Application Number:
JP11862297A
Publication Date:
March 08, 1999
Filing Date:
April 23, 1997
Export Citation:
Assignee:
KUSERUTO CHENTORO SUTEYUDEI E LAB TEREKOMYUNIKATSUIOONI SPA
International Classes:
H01L21/8238; H01S5/042; H01S5/068; H04B10/516; H04B10/54; H04B10/564; H04B10/61; H01L27/092; H04B10/80; H01S5/40; (IPC1-7): H01S3/133; H01L21/8238; H01L27/092; H04B10/04; H04B10/06; H04B10/142; H04B10/152
Domestic Patent References:
| JP7335957A |
Attorney, Agent or Firm:
Kawahara Kazuho