Title:
【発明の名称】回路基板
Document Type and Number:
Japanese Patent JPH0746748
Kind Code:
B2
Abstract:
Electromagnetic filtering for a VLSI device having multiple power input leads is realized by employing a sub-power plane which is physically separate from a main power distribution system on a circuit board. The sub-power plane is placed directly under a corresponding VLSI device. Decoupling capacitors are connected to the sub-power plane and, in turn, to each of the power input leads on the VLSI device. Power is supplied from the main power distribution system to the sub-power plane via a ferrite bead type filter.
Inventors:
RICHAADO EI UINSU
Application Number:
JP20557691A
Publication Date:
May 17, 1995
Filing Date:
July 23, 1991
Export Citation:
Assignee:
AMERIKAN TEREFUON ANDO TEREGURAFU CO
International Classes:
H05K1/14; H03H1/00; H05K1/02; (IPC1-7): H05K1/14
Domestic Patent References:
| JP2187093A |
Attorney, Agent or Firm:
Hirofumi Mimata
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