Title:
【発明の名称】検波装置
Document Type and Number:
Japanese Patent JPS5933859
Kind Code:
B2
Abstract:
A detector which may be subject to temperature variations and power supply drift comprised of an avalanche transistor circuit having a variable threshold that is sensitive to input signals within a useful frequency band and noise which produces threshold signals when the amplitude of the input signals or the noise exceeds the instantaneous value of the variable threshold. The rate at which the threshold signals are produced is determined in an N bit storage device coupled to the avalanche transistor circuit and clocked at a specific repetition rate. The storage device has each stage coupled in parallel to an AND gate and to a summation network. The AND gate produces an output signal which indicates input signals are present when each stage of the storage device applies a specified output signal to the AND gate. The summation network produces a variable output signal having an amplitude that varies at a rate proportional to the rate at which the threshold signals are produced. The variable amplitude signal is applied to a serial circuit which shunts the collector current of the avalanche transistor circuit at a rate commensurate with the rate the variable amplitude signal varies in response to noise but at a substantially lower rate than the rate the variable amplitude signal varies in response to input signals. The serial circuit thereby controls the threshold sensitivity of the avalanche transistor to provide a constant false alarm rate for the apparatus while also compensating for temperature variations and drift in the voltage level of the power supply.
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Inventors:
AREKISANDAA MAAREI NIKORUSON
ROBAATO JOSEFU BUROFUI
ROBAATO JOSEFU BUROFUI
Application Number:
JP10181972A
Publication Date:
August 18, 1984
Filing Date:
October 11, 1972
Export Citation:
Assignee:
ABERCOM AFRICA LTD
International Classes:
H03K3/013; G01S7/32; H03L1/00; (IPC1-7): G01S7/28
Attorney, Agent or Firm:
Nobuyuki Iida