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Patent Searching and Data


Title:
DATA PROCESSOR
Document Type and Number:
Japanese Patent JPH0784822
Kind Code:
A
Abstract:

PURPOSE: To eliminate the need to alter hardware constitution even if a clock frequency is increased in the future and to employ an optimum data transfer system according to the clock frequency.

CONSTITUTION: An input/output interface part 12A supplies data from a D flip-flop 14 in a data processing part 11 to an input/output interface part 12A after holding the data temporarily in the flip-flop or directly according to a set input/output mode, and an input/output interface part 22A supplies the data to a D flip-flop in a data processing part 21 after holding the data in the flip- flop temporarily or directly according to a set input/output mode. The data are transferred securely in a short transfer time, so an optimum input/output mode is determined by test facilitating circuits 13 and 23 and an input/output mode determining circuit.


Inventors:
ASADA YOSHIMI
SUGA ATSUHIRO
Application Number:
JP22527393A
Publication Date:
March 31, 1995
Filing Date:
September 10, 1993
Export Citation:
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Assignee:
FUJITSU LTD
International Classes:
G06F11/22; (IPC1-7): G06F11/22
Attorney, Agent or Firm:
Matsumoto Shinkichi



 
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