Login| Sign Up| Help| Contact|

Patent Searching and Data


Title:
FAULT PROCESSING SYSTEM
Document Type and Number:
Japanese Patent JPH0675800
Kind Code:
A
Abstract:

PURPOSE: To enable retry even though an instruction in execution is in a retry disabling area when a fault is generated in a conversion memory section.

CONSTITUTION: When the fault of a conversion memory section 2 is detected by a fault detection mechanism 12, a reading register 3 and an instruction reading register 4 are held and a selector 11 selects a conversion memory fault processing microprogram start address 13 to start the microprogram. The microprogram notifies the fault processing processor (not shown in the illustration) of the fault. The fault processing processor reads the correct value of the conversion memory section 2 by the instruction reading register 4 from the fault processing processor storage device, performs re-load to the section 2, arranging the environment capable of retrying the instruction. As the all instructions supplied before the instruction with the fault generated are completed, the retry of the instruction can be performed without fail.


Inventors:
MORI KAZUHIRO
NOGUCHI TAKAYUKI
Application Number:
JP9576392A
Publication Date:
March 18, 1994
Filing Date:
April 16, 1992
Export Citation:
Click for automatic bibliography generation   Help
Assignee:
NEC CORP
KOFU NIPPON DENKI KK
International Classes:
G06F9/22; G06F11/14; (IPC1-7): G06F11/14; G06F9/22
Attorney, Agent or Firm:
Naoki Kyomoto (2 outside)



 
Next Patent: INFORMATION PROCESSOR