Title:
【発明の名称】電子機器
Document Type and Number:
Japanese Patent JP2702743
Kind Code:
B2
Abstract:
PURPOSE:To decrease the power consumption by driving a RAM on a prescribed routine and also reducing the frequency of a basic action clock at the run of the RAM and at the same time to increase the processing speed together with reduction of the power consumption by inhibiting the accesses of a ROM during the working of the routine. CONSTITUTION:A control device consists of a C-MOS element and controls the peripheral devices such as a CPU 2, a ROM 3, a RAM 4, etc. The power consumption is considerably decreased for the elements of the CPU2, the static RAM 4, etc., when a clock is switched to a low frequency by a clock generator 1. At the same time, a key input analyzing routine, etc., which are always used are transferred to the RAM 4 out of the programs stored in the ROM 3. Thus the routine is processed by the RAM 4. As a result, the electric power is considerably saved. Then the process software is transferred to the RAM from the ROM, and the clock speed is reduced for the routines that do not require no high-speed processes. Furthermore the chip selecting actions of the ROM are completely inhibited at the refresh of the CPU or at the input/output to the peripheral devices.
Inventors:
Ohira Isao
Application Number:
JP21636888A
Publication Date:
January 26, 1998
Filing Date:
September 01, 1988
Export Citation:
Assignee:
Canon Inc
International Classes:
G06F1/32; G05B15/02; G06F1/04; G06F15/02; (IPC1-7): G06F15/02; G05B15/02; G06F1/04; G06F1/32
Domestic Patent References:
| JP52149032A | ||||
| JP5498672A | ||||
| JP608920A | ||||
| JP6370321A |
Attorney, Agent or Firm:
Kato Taku