PURPOSE: To obtain the efficient decoder capable of high speed decoding by forming the decoder with a syndrome generating means, a single error correction means and a correction disable error check means or the like.

CONSTITUTION: Let b-bits be 1 byte and let (g) be 2b (g=2b), a check matrix for a block A is formed by inserting a row whose elements are all 0 between a 1st row and a 2nd row of a check matrix comprising 3-rows and (g-1)-columns for Reed-Solomon codes in which elements of the 1st row are all 1, a check matrix for a block B is formed by replacing the 1st and 2nd rows with each other, a check matrix comprising two columns of (1101)t and (1110)t is formed as a check matrix for a block K, and a unit matrix comprising 4-rows and 4-columns is used for a check matrix for a block C. The decoder is provided with a syndrome generating means 10 generating syndromes C1-C4 from a received series, a no-error discrimination means 11 discriminating it to be no error when the syndromes C1-C4 are all zero, a single error correction means 14 correcting information of a byte location where an error is in existence by using the size of the error in the case of the single error, and an error check means 17 checking a correction disable error.