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Title:
SEMICONDUCTOR STORAGE DEVICE
Document Type and Number:
Japanese Patent JPH0715312
Kind Code:
A
Abstract:

PURPOSE: To obtain a semiconductor storage device able to prevent malfunction due to power noise generated following the output operation of data.

CONSTITUTION: A control signal CNT1 is inputted to an input buffer circuit 2, from which a control signal CNT2 is outputted to an internal circuit 14. Cell information is read based on the control signal CNT 2 and outputted from an output buffer circuit 9 as output data Dout. A power supply Vcc connecting electrically to the input buffer circuit 2 and the output buffer circuit 9 is supplied to the circuits 2, 9. The input buffer circuit 2 is provided with a noise elimination circuit 15 eliminating noise generated in the control signal CNT 2 based on a noise elimination signal NC. A noise elimination signal generating circuit 16 which is operated based on the control signal CNT 1 or CNT 2 to provide an output of the noise elimination signal NC to the noise elimination circuit 15 synchronously with an output timing of the output data Dout is connected to the input buffer circuit 2.


Inventors:
YAMAMOTO HIROSHI
OGURA KIYONORI
HORII TAKASHI
Application Number:
JP14400193A
Publication Date:
January 17, 1995
Filing Date:
June 15, 1993
Export Citation:
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Assignee:
FUJITSU LTD (JP)
FUJITSU VLSI LTD (JP)
International Classes:
H03K5/1252; G11C8/18; G11C11/409; H03K19/003; (IPC1-7): H03K19/003; H03K5/1252; H03K19/0175
Attorney, Agent or Firm:
Hironobu Onda



 
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