Title:
【発明の名称】混成集積回路装置
Document Type and Number:
Japanese Patent JP2842013
Kind Code:
B2
Abstract:
PURPOSE:To improve the reliability of a hybrid circuit. CONSTITUTION:When the size of a chip capacitor 4 is large in a hybrid integrated circuit device mounting a ceramic chip capacitor on a metal substrate, stress due to thermal expansion difference is generated, because the thermal expansion coefficients are different. A lead terminal 8 having a shape capable of surface mounting is previously connected with a large-sized ceramic capacitor 4, and soldered to a conductor pattern on a substrate 1, together with electronic parts like a minimold transistor. Thereby thermal stress is absorbed by the lead terminal, and excessive stress is not applied to a solder part 6.
Inventors:
SAKATA HIROMI
Application Number:
JP4031792A
Publication Date:
December 24, 1998
Filing Date:
January 30, 1992
Export Citation:
Assignee:
NIPPON DENKI KK
International Classes:
H01L25/00; H01L25/10; H01L25/18; H05K1/05; H05K3/34; (IPC1-7): H01L25/10; H01L25/18
Domestic Patent References:
| JPH01103163A |
Attorney, Agent or Firm:
Naoki Kyomoto (2 outside)