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Title:
SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND ITS MANUFACTURE
Document Type and Number:
Japanese Patent JPH0786297
Kind Code:
A
Abstract:

PURPOSE: To reduce the base resistance of a semiconductor integrated circuit device, by separating its n+-emitter from its external p+-base through the side wall of an insulator, and further, by contacting extensively a metal or a sub stance exhibiting a metallic conduction with the top surface of its external p+-base having a high concentration.

CONSTITUTION: In a semiconductor integrated circuit device, an emitter electrode 251 and a base deriving electrode 341 are separated from each other by a sidewall 261 of an insulator having a narrow width which is formed on the side surface of the emitter electrode 251. Therefore, the dimension of the distance between an n+--emitter 31 or 32 and an external p+-base 311 is specified in a self-aligned way with the sidewall 261 of the insulator made of SiO2. Since the distance between the external p+-base 331 and an element separating insulation layer 6 is large, a p-base 11 having a low concentration is close to an n+-collector plug 12, but the layers having high concentrations are not close to each other. Therefore, the reduction of the base-collector withstanding voltage of the integrated circuit device is not brought. Thereby, the resistance of the external p+-base 331 can be reduced.


Inventors:
FUKAMI AKIRA
MATSUZAKI NOZOMI
YAMANAKA TOSHIAKI
NAGANO TAKAHIRO
MINAMI MASATAKA
YAHATA HIDEJI
Application Number:
JP23123593A
Publication Date:
March 31, 1995
Filing Date:
September 17, 1993
Export Citation:
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Assignee:
HITACHI LTD
International Classes:
H01L29/73; H01L21/331; H01L29/732; (IPC1-7): H01L21/331; H01L29/73
Attorney, Agent or Firm:
Ogawa Katsuo