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Patent Searching and Data


Title:
MANUFACTURE OF FIELD EFFECT TRANSISTOR
Document Type and Number:
Japanese Patent JPS6015978
Kind Code:
A
Abstract:

PURPOSE: To enable the stable manufacture with good reproductivity of MESFET having food Schottky properties and FET properties by a method wherein the gate pattern having vertical walls is connected into an inverted shape as a gate opening on the coating film and heat treatment for recovering the crystal properties is performed while retaining the gate with the vertical walls thereby filling the gate opening with the gate metal again.

CONSTITUTION: An N type operation layer 5 is formed on the high-resistance GaAs substrate 4 and the mask 22 for covering the gate pattern 21 and the periphery of the FET is formed. Then the Si ions are implanted to form a high- concentration impurity layer 6. Subsequently, the substrate is covered with a plasma nitride film 23 and is subjected to the heat treatment in hydrogen to recover the crystal properties of the operation layer 5 and the high-concentration conductive layer 6. Next, a photoresist film 24 is spread and dried to be levelled thinly. Then, the gate pattern 21 is exposed and the photoresist film 24 and the oxide film 21 are removed to form the opening 25. Next, Al is vapor-deposited over the whole surface to form the Al gate electrode 1. On the conductive layer 6, AuGe-Pt is vapor-deposited followed by heat treatment to diffuse AuGe into the conductive layer 6 thereby forming the ohmic electrodes 2 and 3 of the source and drain.


Inventors:
ASAI SHIYUUJI
KOUZU HIDEAKI
Application Number:
JP12400383A
Publication Date:
January 26, 1985
Filing Date:
July 07, 1983
Export Citation:
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Assignee:
NIPPON ELECTRIC CO
International Classes:
H01L29/812; H01L21/338; H01L29/417; H01L29/74; H01L29/80; (IPC1-7): H01L29/80; H01L21/28
Attorney, Agent or Firm:
Uchihara Shin