PURPOSE: To avoid that a test time is affected by dispersion of responsiveness of a device and to shorten a test time for verifying writing data by discriminating whether writing data is performed within an allowable time or not in plural semiconductor memories.
CONSTITUTION: When aging is performed in a EEPROM, many EEPROMs 2 being an object of aging are mounted in freely attachably and detachably, these are connected in parallel each other. After these groups connected to a testing section, a power supply is turned on by a command of a CPU, and a clock signal and a reset signal are made in an 'H' level. After that, an address is cleared and counted by a retry counter 27, successively, a writing command is set by an ALPG 24 and data are simultaneously written by a driving section 21, a verify command is set, and the command is performed. Next, a response signals are inputted to each time comparator 23 any time, an allowable time from an allowable time register 22 is compared with response signals from each ROM, and it is discriminated whether this time is within an allowable time or not.
| JP3162689 | [Title of Invention] Memory System |
| JP2903618 | [Title of Invention] Memory device |
| JP3709057 | SEMICONDUCTOR DEVICE |
NAKANO YASUSHI
TOMITA KEIJI
HITACHI TOKYO ELECTRONICS