Title:
【発明の名称】乗算回路
Document Type and Number:
Japanese Patent JP2985996
Kind Code:
B2
Abstract:
A multiplication circuit for directly multiplying analog and digital data without converting the analog data into digital data or the digital data into analog data. The multiplication circuit controls an analog input voltage by the use of a switching signal of a digital voltage so as to generate an analog output or to cut-off the output. Digital input signals b0 to b7 corresponding to a plural number of bits are integrated and given corresponding weights by use of a capacitive coupling unit, and a sign bit is added by the capacitive coupling unit by giving the sign bit double the weight of the most significant bit of the digital input.
Inventors:
KOTOBUKI KOKURYO
YO KOREYASU
UIWATSUTO UONWARAUIPATSUTO
TAKATORI SUNAO
YAMAMOTO MAKOTO
YO KOREYASU
UIWATSUTO UONWARAUIPATSUTO
TAKATORI SUNAO
YAMAMOTO MAKOTO
Application Number:
JP34149392A
Publication Date:
December 06, 1999
Filing Date:
November 27, 1992
Export Citation:
Assignee:
TAKATORI IKUEIKAI KK
SHAAPU KK
SHAAPU KK
International Classes:
G06J1/00; (IPC1-7): G06J1/00
Domestic Patent References:
| JP49107650A |
Attorney, Agent or Firm:
Yamamoto Makoto