Title:
【発明の名称】乗算回路
Document Type and Number:
Japanese Patent JP3055739
Kind Code:
B2
Abstract:
A multiplication circuit for controlling an analog input voltage by the use of a switching signal created by a digital voltage so as to either generate an analog output or to cut-off the output. A digital input signal having a plural number of bits with given weights are introduced by use of capacitive coupling, and the resulting total becomes the multiplication result.
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Inventors:
Kotobuki Guoliang
Yang Yasuyasu
Wiwat Wonwalla Wipat
Nao Takatori
Makoto Yamamoto
Yang Yasuyasu
Wiwat Wonwalla Wipat
Nao Takatori
Makoto Yamamoto
Application Number:
JP2067693A
Publication Date:
June 26, 2000
Filing Date:
January 13, 1993
Export Citation:
Assignee:
Sharp Corporation
Takayama Co., Ltd.
Takayama Co., Ltd.
International Classes:
G06J1/00; (IPC1-7): G06J1/00
Domestic Patent References:
| JP58195274A | ||||
| JP49123258A |
Attorney, Agent or Firm:
Makoto Yamamoto