PURPOSE: To realize form overlay printing at high speed by drawing both images of a form image and a printing image on separate areas in one memory when a form overlay is performed, reading out the images drawn on the respective areas when the images are read out for printing and synthesizing the images to be printed.
CONSTITUTION: In the case where a form image to be used for a form overlay is sent from a host apparatus into a printing apparatus, drawing is performed for a memory 20 by a CPU circuit 10. Then, when printing data (non-storing image) to be synthesized with the preceding form image are sent from the host apparatus, the printing data are drawn on an address in the memory 20 together with the address where the preceding form image has been drawn. Upon drawings of the non-storing image and form image in the memory 20, image synthesis at the time of the form overlay is started, and, after the images in the memory 20 are inputted into a memory readout circuit 41, printing start is instructed to a printing processing unit 30, and a group of signals subjected to the OR operation by a synthesizing circuit 45 is outputted to the printing processing unit 30.
SATO KOICHI
NEC CORP
JPS58128879A | 1983-08-01 | |||
JPS60141573A | 1985-07-26 | |||
JPS55135978A | 1980-10-23 | |||
JPS57109684A | 1982-07-08 | |||
JPS58112770A | 1983-07-05 |