Title:
【発明の名称】電力消費量が最小であるノツチ形成回路
Document Type and Number:
Japanese Patent JPH04500289
Kind Code:
A
Abstract:
A circuit for cutting a "notch" in an alternating current supply waveform with the minimization of dissipated power comprising a pair of GTO's so poled to conduct current therethrough and also through a pair of power consuming diodes when the switches are "on" during alternate half cycles, the switches being turned "off" at the start of the "notches", and the current is resumed thereafter by a pair of oppositely poled SCR's which are turned "on" and which bypass power diodes so as to conserve power.
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Inventors:
Black, Giunia, Robert A.
Aaron Day, Compelian
Aaron Day, Compelian
Application Number:
JP50936889A
Publication Date:
January 16, 1992
Filing Date:
August 28, 1989
Export Citation:
Assignee:
Honeywell Incorporated
International Classes:
H05B41/392; G05F1/45; H02M5/293; (IPC1-7): G05F1/45; H05B41/392
Attorney, Agent or Firm:
Masaki Yamakawa (4 outside)