PURPOSE: To obtain the pulse width modulation(PWM) circuit in which current ripple is reduced and a frequency band width is extended by comparing a dither signal used for a pair component with a dither signal used for other pair component and deviating the phase of the signal timewise.

CONSTITUTION: A dither signal shifted timewise is compared with a noninverting command signal in place of using an inverted command signal to obtain a 'prime (main)' signal. In this case, the amount of timewise shift is t/2 (t is a period of a dither signal). Signals x, x' being outputs of comparators are given to complement generating circuits 44, 45, from which output signals y, y' are generated. Since the signals y, y' are obtained through the processing of complement only, the signals y, y' are subordinated to the signals x, x'. Then the signals x, y are given to a bridge A48, while the signals x', y' are given to a bridge B50. A load 32 is connected to the two bridges 48, 50.