PURPOSE: To stabilize a PLL when an unstable signal is inputted for a prescribed period by providing a function stopping the PLL operation for a prescribed period and holding an input control voltage of a voltage controlled oscillator to the PLL circuit.

CONSTITUTION: The control is conducted that an output as a result of phase comparison between a frequency-division output of a frequency divider 2 and an external input signal 6 is grounded at a low pass filter (LPF)4 through a switch 12 and an output of a phase comparator 3 is connected to or disconnected from the LPF4 by a signal 13. Thus, the function stopping the PLL operation for a prescribed time and holding a control voltage of the voltage controlled oscillator 1 is provided. The more stable PLL circuit is realized by turning off the switch 12 by using the signal 13 when a stable external signal is inputted.