Title:
【発明の名称】発振回路
Document Type and Number:
Japanese Patent JP3036756
Kind Code:
B2
Abstract:
PURPOSE:To lower energy consumption by enlarging the resistance value of a resistor to determine an oscillating frequency. CONSTITUTION:A comparator COMP is equipped with a transistor Q1 which constitutes the inverse of an input In for a differential amplifier, transistor Q2 to constitute a first forward input In and transistor Q3 to constitute a second forward input In. A capacitor C is connected between the inverse of the input In and grounding and to one end of the capacitor C, the output of a current mirror circuit CM is connected to be the output of a capacitor charging/discharging means. Resistors R1-R4 are provided to divide a reference voltage Vref and to impress the divided voltage to the bases of the transistors Q2 and Q3 and respectively connected to the first forward input In and second forward input In. Thus, since the oscillating frequency is determined according to the ratio of the resistors R1-R4 which determine a threshold value, the energy consumption can be lowered by enlarging the resistance value.
Inventors:
Koichi Nishimura
Application Number:
JP14916089A
Publication Date:
April 24, 2000
Filing Date:
June 12, 1989
Export Citation:
Assignee:
NEC
International Classes:
H03K3/0231; H03K3/023; (IPC1-7): H03K3/0231
Domestic Patent References:
| JP5962210A | ||||
| JP5720021A | ||||
| JP6010811A | ||||
| JP5919422A | ||||
| JP5677143U |
Attorney, Agent or Firm:
Naoki Kyomoto