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Patent Searching and Data


Title:
SEMICONDUCTOR TEST DEVICE
Document Type and Number:
Japanese Patent JPH0661318
Kind Code:
A
Abstract:

PURPOSE: To test the electric characteristics of a semiconductor wafer efficiently by a method wherein the semiconductor wafer for a test device, a bump electrode, a lead-out electrode and a connection mechanism, with which the lead-out electrode is connected to a tester, are provided separately from the semiconductor wafer to be tested.

CONSTITUTION: A group of bump electrodes 22, formed on one side of a semiconductor wafer 21 for testing, are electrically connected to each electrode pad 13 of the circuit elements 12 of a semiconductor wafer W to be tested. The electric signals for measurement is outputted form the tester are simultaneously given to the circuit elements 12 of the semiconductor wafe W to be tested through the intermediary of a connection mechanism 32, a take-out electrode 23 and the bump electrode 22. Based on the above-mentioned electric signal, the response signal outputted from the prescribed electrode pad 13 of each circuit element 12 is given to a tester through the intermediary of the bump electrode 22, the take-out electrode 23 and the connection mechanism 32, and the electric characteristics of the circuit element 12 are collectively tested. As a result, the test of the electric characteristics of the semiconductor wafer W can be conducted efficiently.


Inventors:
FUJII TOSHIFUMI
KOINE MASAYOSHI
Application Number:
JP23525892A
Publication Date:
March 04, 1994
Filing Date:
August 10, 1992
Export Citation:
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Assignee:
ROHM CO LTD
International Classes:
H01L21/66; G01R1/073; (IPC1-7): H01L21/66; G01R1/073
Attorney, Agent or Firm:
Tsutomu Sugitani