Title:
【発明の名称】処理システムのスケジューリング
Document Type and Number:
Japanese Patent JP2002530738
Kind Code:
A
Abstract:
The present invention presents a processing system (1) comprising a number of memory-sharing processors (10a-e) arranged for parallel processing of jobs, and data consistency means (14) for assuring data consistency. The processing system (1) comprises a scheduler (17), for scheduling jobs for execution on the processors (10a-e) according to a first algorithm. The processing system (1) according to the present invention further uses means for retiring the jobs (18) in an order given by a second algorithm, preferably according to a global order of creation. The second algorithm is different from the first algorithm. The first algorithm may be adjusted to the particular system used, and may base the scheduling to a particular processor on e.g. the source, target, communication channel or creating processor for the job in question. The processing system (1) uses a common job queue (16), and the scheduling is preferably performed adaptively.
Inventors:
Holmberg, Pell, Anders
Kling, Lars-Olyan
Yonson, Sten, Edward
Sohonii, Milind
Tike Cal, Nik Hill
Kling, Lars-Olyan
Yonson, Sten, Edward
Sohonii, Milind
Tike Cal, Nik Hill
Application Number:
JP2000582886A
Publication Date:
September 17, 2002
Filing Date:
November 12, 1999
Export Citation:
Assignee:
Telefon Acty Boraget Elm Ericson (Pubble)
International Classes:
G06F15/16; G06F9/38; G06F9/46; G06F9/50; G06F9/52; G06F15/173; G06F15/80; H04Q3/545; (IPC1-7): G06F9/46; G06F15/16
Domestic Patent References:
| JPH10187464A | 1998-07-21 |
Attorney, Agent or Firm:
Akira Asamura (3 outside)