Title:
【発明の名称】半導体集積回路装置
Document Type and Number:
Japanese Patent JP2530051
Kind Code:
B2
Abstract:
A semiconductor integrated circuit comprising a semiconductor chip provided within a package, inner leads connected to the semiconductor chip, and a high-frequency noise filter connected to the inner leads. The semiconductor chip includes a high-frequency circuit. Thereby, this semiconductor integrated circuit prevents an around circuit from being damaged by high-frequency noise generated from the high-frequency circuit, without installing the noise filter around the semiconductor integrated circuit.
Inventors:
NAGASE MASASHI
Application Number:
JP19407690A
Publication Date:
September 04, 1996
Filing Date:
July 24, 1990
Export Citation:
Assignee:
TOKYO SHIBAURA ELECTRIC CO
International Classes:
H01L23/552; H01L23/50; H01L23/66; H03H1/00; H03H7/01; (IPC1-7): H01L23/50
Domestic Patent References:
| JP1274499A | ||||
| JP6382951U |
Attorney, Agent or Firm:
Takehiko Suzue (3 outside)