Title:
【発明の名称】半導体集積回路装置及びその製造方法
Document Type and Number:
Japanese Patent JP2882395
Kind Code:
B2
Abstract:
An integrated circuit structure comprises a conductor film that serves as a passive element or an interconnection, and a silicon substrate. A cavity is disposed between the substrate and the conductor film and thus underneath the conductor film. The substrate is formed by forming an island of oxide film in a surface of the substrate, and then wet etching the island from the surface of the substrate thereby forming the cavity.
Inventors:
KINOSHITA YASUSHI
Application Number:
JP6973297A
Publication Date:
April 12, 1999
Filing Date:
March 24, 1997
Export Citation:
Assignee:
NIPPON DENKI KK
International Classes:
H01L27/04; H01L21/02; H01L21/762; H01L21/768; H01L21/822; H01L23/522; H01L27/06; (IPC1-7): H01L27/04; H01L21/768; H01L21/822
Domestic Patent References:
| JP4165665A | ||||
| JP3129762A | ||||
| JP1222489A | ||||
| JP6310612A | ||||
| JP536841A |
Attorney, Agent or Firm:
Naoki Kyomoto (2 outside)