Title:
【発明の名称】信号伝送回路
Document Type and Number:
Japanese Patent JP2897672
Kind Code:
B2
Abstract:
PURPOSE: To reduce power consumption by forming a positive feedback circuit via a termination resistor for impedance matching at an input terminal of a transmission circuit and connecting a push-pull circuit comprising a CMOS transistor(TR) to a signal line so as to block a DC component of a transmission signal through the signal line. CONSTITUTION: A signal sent by a driver circuit 1 is received by a receiver circuit 3 via a signal line 2 and a termination resistor 4 is connected to a receiver input terminal for impedance matching. That is, the signal line 2 is connected to one terminal of the termination resistor 4 and connects to an input terminal of a push-pull circuit 6 comprising a CMOS TR via an inverter 5. The other terminal of the resistor 4 is connected to an internal circuit of the circuit 3 and to an output terminal of the circuit 6. The inverter 5 and the circuit 6 form a positive feedback circuit in which the resistor 4 is used for a feedback resistor. Thus, the DC component of the transmission signal through the signal line 2 is blocked to reduce the entire power consumption.
Inventors:
YAMADA YOSHUKI
Application Number:
JP2095295A
Publication Date:
May 31, 1999
Filing Date:
January 13, 1995
Export Citation:
Assignee:
NIPPON DENKI KK
International Classes:
H04L25/02; G06F3/00; H03K19/0175; H04B3/02; (IPC1-7): H04L25/02; G06F3/00; H03K19/0175
Domestic Patent References:
| JP3116214A | ||||
| JP661836A | ||||
| JP5276070A | ||||
| JP24075A | ||||
| JP4160921A |
Attorney, Agent or Firm:
Asato Kato