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Patent Searching and Data


Title:
TTL LOGICAL CIRCUIT
Document Type and Number:
Japanese Patent JPS5854732
Kind Code:
A
Abstract:

PURPOSE: To decrease a transient current flowing in the transient state of switching, by separately providing an off-buffer circuit drive transistor (TR) and an inverting TR, in place of an off-buffer circuit drive TR.

CONSTITUTION: When a signal level at an input terminal A is smaller than a VBE, TRs2,3 of an off-buffer circuit are turned on and an inverting TR4 is turned off and an output terminal D goes to high level VOH. When the input signal level reaches VBE+Vf, an off-buffer circuit drive TR6 reaches the saturation state, and the potential of the collector C starts decreasing to the sum of a collector-to-emitter voltage VCE at the saturation of the TR6 and a cathode- to-anode voltage Vf of a diode D3 from the power supply voltage Vcc. Thus, when the potential difference between the collector C and the output terminal D of the TR6 becomes smaller than 2VBE, the TRs2,3 are turned off. The transient current of the TRs3,4 is reduced to zero at the transient state of switching.


Inventors:
TANIZAWA SATORU
Application Number:
JP15199981A
Publication Date:
March 31, 1983
Filing Date:
September 28, 1981
Export Citation:
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Assignee:
FUJITSU LTD
International Classes:
H03K19/088; H03K19/00; (IPC1-7): H03K19/088
Domestic Patent References:
JPS5086967A1975-07-12
JPS5560339A1980-05-07
Attorney, Agent or Firm:
Aoki Akira