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Patent Searching and Data


Title:
DATA PROCESSOR FOR LOGICAL SIMULATION
Document Type and Number:
Japanese Patent JPS5814257
Kind Code:
A
Abstract:

PURPOSE: To constitute a system suitable for a logical simulation, by constituting a status section storing connecting information of a logical circuit and the circuit status with a plurality of storage blocks and operating units so that a parallel processing can be possible for the operation.

CONSTITUTION: A control section 5 controls the processing process for the entire device. Data corresponding to an event table are stored in an event section 6 and the data are transmitted to a status section 7 as required. The status section 7 is constituted with a plurality of blocks for possible pipeline processing and data corresponding to an element table, and input value table and an output table are stored in the section 7. An operation section 8 consists of a plurality of operation units, the decision of a new status value of elements is executed in parallel and the result is transmitted to the event section 6.


Inventors:
KAWATO NOBUAKI
Application Number:
JP11190181A
Publication Date:
January 27, 1983
Filing Date:
July 17, 1981
Export Citation:
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Assignee:
FUJITSU LTD
International Classes:
G06F11/25; G06F11/36; G06F17/50; (IPC1-7): G06F11/28
Domestic Patent References:
JPS567167A1981-01-24
Attorney, Agent or Firm:
Koshiro Matsuoka