PURPOSE: To sharply improve the processing capability of an entire system by switching a DMA transfer mode without increasing the load on a host computer.

CONSTITUTION: Data outputted from a processor are collected by a PI/O device 2, data on a LAN are fetched by a transmission interface device 5, and temporarily stored in a transmitted data memory device 4, and a high-speed transfer command and a low-speed transfer command outputted from a host computer 3 are stored in a control memory part 7. Then, when a DMA command is outputted from the host computer 3, a DMA controller 6 is operated based on the content of the high-speed transfer command and the low-speed transfer command stored in the control memory part 7, and DMA transfer between the PI/O device 2 and the transmitted data memory device 4 is operated.