Title:
【発明の名称】温度補償回路
Document Type and Number:
Japanese Patent JP3099737
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To make a CMOS logic circuit stable by compensating a temperature dependene of a delay time in the CMOS logic circuit. SOLUTION: The circuit is provided with a sensor transistor (TR) 21 whose drain connects to an input terminal of a current mirror 22, whose gate connects to a high-voltage side of a power supply supplied to a CMOS logic circuit 10, and whose source connects to a low-voltage side of the power supply supplied to the CMOS logic circuit 10, a voltage detection circuit 23 receiving an output of the current mirror 22 to obtain a voltage corresponding to a drain current of the sensor Tr 21, a comparator section 24 comparing an output voltage of the voltage-detection section 23 with a reference voltage depending on the power supply voltage, and a current boost TR 25 controlling an external input power supply. based on the output of the comparison section 24. Then the power supply voltage is controlled so that the output voltage of the voltage detection section 23 is equal to the reference voltage, so as to compensate a temperature fluctuation in a delay time of the CMOS logic circuit 10.
Inventors:
Dai Kato
Application Number:
JP16289996A
Publication Date:
October 16, 2000
Filing Date:
June 24, 1996
Export Citation:
Assignee:
Yokogawa Electric Corporation
International Classes:
H03K17/14; H03K17/687; H03K19/00; H03K19/0948; (IPC1-7): H03K17/14; H03K17/687; H03K19/00; H03K19/0948
Domestic Patent References:
| JP311823A | ||||
| JP2278916A | ||||
| JP4297119A | ||||
| JP9128068A | ||||
| JP429236U |
Attorney, Agent or Firm:
Masayasu Watanabe