Title:
【発明の名称】タイミングシミュレーションシステム
Document Type and Number:
Japanese Patent JP2784104
Kind Code:
B2
Abstract:
A timing simulation system has a layout pattern data storage portion, a data extracting portion, a process parameter storage portion, a gain coefficient calculating portion, an attendant capacitance supply portion, and a timing simulation executing portion. The gain coefficient calculating portion and the attendant capacitance calculating portion calculate gain coefficients and attendant capacitances peculiar to elements and wires from the circuit connection data extracted from layout pattern data of a logic circuit, and the gain coefficient supply portion and the attendant capacitance supply portion set the gain coefficients and the attendant capacitances. The timing simulation executing portion calculates the total load capacitance and the total gain coefficient with respect to a group of equipotential wires in which the signal value changes, calculates the transition time of the signal value on the wires based on the total load capacitance and the total gain coefficient, and executes timing simulation while using the transition time as a signal propagation delay time.
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Inventors:
TANI TAKAHIRO
Application Number:
JP19657191A
Publication Date:
August 06, 1998
Filing Date:
August 06, 1991
Export Citation:
Assignee:
MITSUBISHI DENKI KK
International Classes:
G06F11/25; G06F17/50; (IPC1-7): G06F17/50
Domestic Patent References:
| JP358279A | ||||
| JP1156864A | ||||
| JP62298840A |
Attorney, Agent or Firm:
Soga Doteru (6 people outside)