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Patent Searching and Data


Title:
MANUFACTURE OF SEMICONDUCTOR ELEMENT
Document Type and Number:
Japanese Patent JPH0697186
Kind Code:
A
Abstract:

PURPOSE: To obtain a second epitaxial growth layer which has an improved flatness by using selective epitaxial growth, instead of isotropic etching, for silicon and thereby eliminating troubles specific to isotropic etching.

CONSTITUTION: A p-type epitaxial layer 12 of mesa shape is formed on a semiconductor substrate 1 by a selective epitaxial growth method. A mask layer 13 is formed on the uppermost layer of the mesa epitaxial layer 12. A silicon film containing Sb is deposited on exposed parts of the semiconductor substrate 1 and the mesa p-type epitaxial layer 12. The collector 15 of a transistor is formed by heat treatment, and then an n-type epitaxial layer 16 is formed. The resultant device is then subjected to a 'mecha-chemical' polishing process involving chemicals, which is so designed that the polishing operation is automatically stopped when the mask layer 13 is reached. This obtains a semiconductor element which enables higher degrees of integration, making it possible to manufacture integrated circuits having a high breakdown voltage.


Inventors:
KUNIHIRO TAKASHI
Application Number:
JP24387992A
Publication Date:
April 08, 1994
Filing Date:
September 14, 1992
Export Citation:
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Assignee:
TOSHIBA CORP
International Classes:
H01L21/02; H01L21/306; H01L21/331; H01L29/73; H01L29/732; (IPC1-7): H01L21/331; H01L21/02; H01L21/306; H01L29/73
Attorney, Agent or Firm:
Norio Ogo