PURPOSE: To form the intervals among a gate and a source and a drain by self-alignment and to prevent a short-circuit with the gate electrode and the deterioration of a breakdown withstand voltage by controlling the selective epitaxial growth of the GaAs which is formed in the window part for introduction of impurities after forming source and drain regions on a surface of the substrate.
CONSTITUTION: The N type region 2 which will become a semiconductor active layer is formed on a semi-insulating GaAs substrate 1. Next, the windows 4 for formation of source and drain are patterned on the insulating film 3 consisting of SiO2 and etc. covering the substrate 1. Then N type impurity, e.g. Si is ion-implanted through the windows 4 followed by heat treatment to form N+ type source and drain regions 5. After forming the source and drain regions 5, the GaAs 6 as a semi-insulating material is epitaxially grown by selective gas-phase growth. The GaAs 6 grows only on the substrate 1 of the part for the window 4 and the circumferential end 6a of the growing GaAs 6 is arranged to reach the upper surface of the insulating film 3 thereby preventing the gate electrode 7 which is formed in the next step from coming in contact with the source and drain regions 5.
KAWAJI MOTONORI
Next Patent: MANUFACTURE OF SCHOTTKY GATE TYPE FIELD EFFECT TRANSISTOR