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Patent Searching and Data


Title:
MANUFACTURE OF SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JPS5951575
Kind Code:
A
Abstract:

PURPOSE: To increase dielectric resistance between a gate and a source, to improve a voltage amplification factor and to augment currents by providing a process, in which a thermal oxide film is formed and removed, a gate forming process and a source forming process.

CONSTITUTION: An underlay oxide film 14 is formed on an N type epitaxial layer 12a, a nitride film 13 is deposited, only the nitride film 13 is patterned by using plasma etching, and thick oxide films 15 in approximately 1∼2μm are formed by using a method such as oxidation at high pressure. When the oxide films 15 and the nitride film 13 are removed extending over the whole surface, projected sections 17 to which the sources are formed and recessed sections 16 to which the gates are formed can be formed to the N type epitaxial layer 12a. Sections as source regions are coated with resists 18 as masks for ion implantation, P+ type impurity regions 19 are formed on the bottoms of the recessed sections 16, and the regions 19 are diffused up to predetermined channel width 23 through heat treatment to form gates 20. Nitride films 21 are left on the source regions and the gates 20, oxide films 22 are formed to the side surfaces of the recessed sections, and the N+ type sources 25 are formed under the projected sections through a method such as ion implantation.


Inventors:
ISHIKAWA OSAMU
EZAKI TAKEYA
KUBOTA MASABUMI
NISHIZAWA JIYUNICHI
Application Number:
JP16249982A
Publication Date:
March 26, 1984
Filing Date:
September 17, 1982
Export Citation:
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Assignee:
MATSUSHITA ELECTRIC IND CO LTD
HANDOTAI KENKYU SHINKOKAI
International Classes:
H01L21/31; H01L29/80; (IPC1-7): H01L21/31
Attorney, Agent or Firm:
Toshio Nakao