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Title:
COHERENCY CONTROLLER AND MAINTENANCE METHOD IN MULTIPROCESSOR SYSTEM
Document Type and Number:
Japanese Patent JPH0784877
Kind Code:
A
Abstract:

PURPOSE: To provide a device and a method for maintaining coherency in the mutual connection system of multiple processors and minimizing communication therefor.

CONSTITUTION: A record is stored in at least one global storage controller 16. The mutual connection system 12 is provided between a processor 18 and the global storage controller for data and synchronous communication between nodes. The global storage controller is provided with a coherency controller for tracking the one present on the present processor of the respective instances of the record. The respective processors execute a cache management process for releasing the tree interval of a local cache. When the free interval is identified, free informing is sent to the global storage controller possessing the record corresponding to the instance present in the interval, the interval is marked as invalid inside the cache directory 28 of the processor and the indicator is eliminated from a coherency directory for the global storage controller.


Inventors:
RATSUSERU DEIIN FUUBAA
JIYON KURISUTOFUAA UIRISU
DONARUDO FURANSHISU BARUDASU
FUREDERITSUKU JIEIKOBU JIIGURA
RISHINGU RIYUU
Application Number:
JP15187394A
Publication Date:
March 31, 1995
Filing Date:
July 04, 1994
Export Citation:
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Assignee:
IBM
International Classes:
G06F12/08; G06F15/16; G06F15/177; (IPC1-7): G06F12/08; G06F15/163
Domestic Patent References:
JPH04191946A1992-07-10
JPH03253963A1991-11-13
JPH02224161A1990-09-06
JPH0222757A1990-01-25
Attorney, Agent or Firm:
Kiyoshi Goda (2 outside)