PURPOSE: To obtain a plurality of output signals with a regularity and different time interval, by providing a plurality of frequency division circuits with different frequency dividing ratio for output terminals of a pulse signal.

CONSTITUTION: A terminal voltage 13 of a capacitor 13 is inputted to voltage comparators 4 and 5. When a terminal voltage 13 reaches an upper refernce voltge, the output of the voltage comparator 4 goes to "1" and an flip-flop 6 is set. As a result, a transistor 7 turns on, charge of a capacitor 3 is discharged to decrease the terminal voltage 13. When the terminal voltage 13 reaches a lower reference voltage, the output of the voltage comparator 5 goes to "1", the flip-flop 6 is reset. As a result, the termianl 13 again rises. This output pulse is frequency-divided at frequency division circuits 21∼24 having different frequency dividing ratio and the output is picked up.