PURPOSE: To prevent the deterioration in the bit rate of a buffer storage device, by changing the revision of information of a replace control circuit with the mode of a control register and performing the revision control in response to the operating state of a computer.

CONSTITUTION: Switching of AND gates 8, 9 and 10 is controlled by setting bits , 1, 2, of a control register 7. When "1" signal appears at either one of access iD lines 4, 5 and 6 corresponding to an access request, an LRU revision inhibiting signal is given to an LRU circuit 12 via an OR gate 11. When no revision inhibiting signal is outputted for the LRU information in the circuit 12 with the channel device access, the revision is made possible and when no required data is found out on a buffer storage device, a replace decision circuit 13 determines the way to be replaced, the replacement of data is done in the way and the LRU information is revised at the same time.