Login| Sign Up| Help| Contact|

Patent Searching and Data


Title:
SYSTEM FOR REDUCING NUMBER OF POINTS TO BE TESTED ON PRINTED WIRING BOARD AND METHOD THEREFOR
Document Type and Number:
Japanese Patent JPH0674992
Kind Code:
A
Abstract:

PURPOSE: To reduce the number of points to be tested by analyzing a network trace and a mounting pad to judge the continuity between the surfaces of the upper and lower parts of a dual side printed wiring board.

CONSTITUTION: A printed wiring board 20 is equipped with upper and rear surfaces 20a, 20b and a plurality of network traces 22, 24 traversing both surfaces of the wiring board to extend. The respective network traces have end points. This system has a first processor means discriminating the end points of the network traces extending along both surfaces of the printed wiring board and a second processor means discriminating the through-holes 28, 30 common to both surfaces of the printed wiring board and provided along the network traces. Test means testing the respective surfaces of the printed wiring board independently between one end point and through-hole of the upper surface of the printed wiring board and the through-hole and second end point of the rear surface thereof are provided.


Inventors:
RABATO II HOWAITOHETSUDO
EBUAN JIEI EBUANZU
SUTEIIBUN JIEI FUOSUTA
Application Number:
JP3887592A
Publication Date:
March 18, 1994
Filing Date:
January 10, 1992
Export Citation:
Click for automatic bibliography generation   Help
Assignee:
ELECTRON PATSUKEIJINGU CO
International Classes:
G01R31/28; H05K1/02; H05K1/14; G01R31/02; H05K3/00; (IPC1-7): G01R31/02; H05K1/14; H05K3/00
Attorney, Agent or Firm:
Yuzo Sanada (1 person outside)



 
Next Patent: 情報処理装置