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Patent Searching and Data


Title:
SEQUENTIALLY SCANNING CONVERTING DEVICE
Document Type and Number:
Japanese Patent JPS6048690
Kind Code:
A
Abstract:

PURPOSE: To simplify the constitution and also to reduce the manufacture cost by providing the 1st and 2nd delay elements, an adder and a Y/C separating circuit.

CONSTITUTION: The 1st and 2nd field memories 2a, 2b giving respeectively a delay for 1V's share to a composite video signal ICS and connected in series sequentially from inpuct side are provided, an input of the 1st field memory 2a and an output of the 2nd field memory 2b are added 9, the added output is given to an interpolation signal generator 11 and also the changed component of the video image between frames from each output is obtained, the component is given to a moving detectore 15 and a luminance signal Y and a chrominance signal C are separated by the Y/C separator 7 from the output of the 1st field memory 2a based on the correlation between scanning lines. Since only the two field memories having a delay for 1V's share are used, the constitution is simplified and the manufacture cost is reduced in this way, the very effective sequential scanning converting device is attained.


Inventors:
FUJIMURA RIYUUICHI
Application Number:
JP15689083A
Publication Date:
March 16, 1985
Filing Date:
August 27, 1983
Export Citation:
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Assignee:
NIPPON DENKI HOME ELECTRONICS
International Classes:
H04N11/20; (IPC1-7): H04N11/20
Attorney, Agent or Firm:
Masaki Yamakawa