PURPOSE: To transmit high-speed data through a low-speed data transmission line by separating the high-speed data into plural low-speed data and transmitting them in parallel together with added frame synchronizing signals, and synthesizing them into the high-speed data on a reception side.

CONSTITUTION: At a transmitting data terminal station 1, high-speed data 2 is inputted to a separating circuit 3 for separating the input data, bit by bit, into plural data cyclically. In the figure, the high-speed data 2 is separated into five low-speed strings 5∼9. Those low-speed data strings 5∼9 are given frame synchronizing signals by a frame appending circuit 10 and then transmitted to a receiving data terminal station 12 through low-speed transmission lines 11-1∼ 11-5. The separated data received by memory circuits 13-1∼13-5 through the low-speed transmission lines are inputted through frame detecting circuits 14-1∼ 14-5 to a synthesizing circuit 16, which reconstitutes the original high-speed data 2.