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Title:
IC COMPARATOR CIRCUIT
Document Type and Number:
Japanese Patent JPS5824228
Kind Code:
A
Abstract:

PURPOSE: To obtain an IC comparator which has stable and high-precision hysteresis width, by constituting a positive feedback circuit between a power amplification part and a current mirror circuit which converts the output of a differential stage into a single end output.

CONSTITUTION: The differential state of the differential input stage composed of multicollector transistors TRQ2 and TRQ1 is converted into a single end output by the current mirror circuit CM composed of TRs Q3 and Q4. Diodes D1 and D2 and power TRs Q5 and Q6 constitute an internal positive feedback circuit IPF to shunt a current IC1 from an input stage D1 to the circuit CM and the collector current IC4 of the TRQ4 at the ratio of the base B-emitter E junction area of the TRQ3 and the B-E junction area of the TRQ4. An offset voltage VOS1 for turning on a TRQ6 when a voltage at an input terminal P1 higher than that at an input terminal P2 is lowered, and an offset voltage VOS2 for turning off the TRQ6 when the lower voltage at the terminal P1 is rised are determined by the B-E area ratio of the TRs Q1, Q2, Q3, and Q4, and the area ratio A/B of the multicollectors of the TRQ2.


Inventors:
YONEDA OSAMU
Application Number:
JP12237981A
Publication Date:
February 14, 1983
Filing Date:
August 06, 1981
Export Citation:
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Assignee:
NIPPON KOGAKU KK
International Classes:
H03K3/0233; (IPC1-7): H03K3/02
Domestic Patent References:
JPS5643825A1981-04-22
Attorney, Agent or Firm:
Masao Okabe (2 outside)