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Patent Searching and Data


Title:
SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JPH0677407
Kind Code:
A
Abstract:

PURPOSE: To significantly reduce the dielectric loss and eddy-current loss and enable the formation of a favorable inductor by removing part of a semiconductor substrate to form a cavitied first region and forming a wiring layer, acting as an inductor, on the major surface thereof with an insulating film in-between.

CONSTITUTION: Part of a silicon substrate 11 is removed to form a cavitied removal region 12, and an insulating layer 13 is formed on the removal region 12 and its peripheral area. A wiring layer 14 to be one outgoing line of an inductor is formed on the insulating layer 13, and further a layer insulating layer 15 is also formed thereon. A spiral wiring layer 16 to be the other outgoing line of the inductor is formed on the layer insulating layer 15, and an insulating layer 17 is formed thereon. A contact hole 15a is formed in a part of the layer insulating layer 15 to connect the wiring layer 14 with the wiring layer 16. As mentioned above, part of the substrate 11 is removed to form a cavity, or the first region, and the inductor is formed in correspondence to the region; this significantly reduces the dielectric loss and eddy-current loss.


Inventors:
KANEHACHI KAORU
Application Number:
JP8350992A
Publication Date:
March 18, 1994
Filing Date:
April 06, 1992
Export Citation:
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Assignee:
NIPPON PRECISION CIRCUITS
International Classes:
H01L21/822; H01L27/04; H01L27/08; (IPC1-7): H01L27/04
Domestic Patent References:
JPS5372584A1978-06-28
JPS5910067A1984-01-19
JPH0483341A1992-03-17
JPS6485407A1989-03-30
JPH04109604A1992-04-10
JP45010982A
Attorney, Agent or Firm:
Kazuko Matsuda