MANUFACTURE OF SEMICONDUCTOR DEVICE

Japanese Patent JPS6028248

A

PURPOSE:To prevent the disconnection of a second layer wiring formed on an Al wiring conductor by forming the conductor to a predetermined shape and forming the fringe of the conductor to a tapered shape through a DC bias sputtering method in which the semiconductor substrate side is brought to negative voltage when the Al wiring conductor is shaped on the substrate through an insulating layer. CONSTITUTION:A SiO2 layer 2 is applied on a Si substrate 1, an Al wiring conductor is laminated on the layer 2, and the conductor is changed into prescribed wiring layers 3 through reactive ion etching using a mixed gas of CCl4 and Cl2. Since the stepped sections of the wiring layers 3 are steep under the state, the following process is executed. That is, high-purity quartz glass is used as a target for sputtering, DC negative voltage applied to the substrate 1 is brought to -600--700V and RF sputtering is executed, and SiO2 films 4 are each formed to the surfaces of the wiring layers 3 and the surfaces of the exposed substrates 1 white the edge sections of the wiring layers 3 are tapered. The films 4 are renewed into a SiO2 film 4' coating the whole surface, and a second layer Al wiring layer 5 is attached on the film 4'.

HAZUKI RIYOUICHI

JP13590783A

February 13, 1985

July 27, 1983

Click for automatic bibliography generation  

TOSHIBA KK

H01L21/3205; (IPC1-7): H01L21/88

Noriyuki Noriyuki

Previous Patent: An artificial joint which has the expansion-and-contraction hinge provided with a deployment axis

Next Patent: JPS6028249